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watchdog.h
1// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
2
3/*
4 * Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#ifndef _HARDWARE_STRUCTS_WATCHDOG_H
10#define _HARDWARE_STRUCTS_WATCHDOG_H
11
13#include "hardware/regs/watchdog.h"
14
15// Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_watchdog
16//
17// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
18// _REG_(x) will link to the corresponding register in hardware/regs/watchdog.h.
19//
20// Bit-field descriptions are of the form:
21// BITMASK [BITRANGE]: FIELDNAME (RESETVALUE): DESCRIPTION
22
23typedef struct {
24 _REG_(WATCHDOG_CTRL_OFFSET) // WATCHDOG_CTRL
25 // Watchdog control
26 // 0x80000000 [31] : TRIGGER (0): Trigger a watchdog reset
27 // 0x40000000 [30] : ENABLE (0): When not enabled the watchdog timer is paused
28 // 0x04000000 [26] : PAUSE_DBG1 (1): Pause the watchdog timer when processor 1 is in debug mode
29 // 0x02000000 [25] : PAUSE_DBG0 (1): Pause the watchdog timer when processor 0 is in debug mode
30 // 0x01000000 [24] : PAUSE_JTAG (1): Pause the watchdog timer when JTAG is accessing the bus fabric
31 // 0x00ffffff [23:0] : TIME (0): Indicates the number of ticks / 2 (see errata RP2040-E1) before a watchdog reset will...
32 io_rw_32 ctrl;
33
34 _REG_(WATCHDOG_LOAD_OFFSET) // WATCHDOG_LOAD
35 // Load the watchdog timer
36 // 0x00ffffff [23:0] : LOAD (0)
37 io_wo_32 load;
38
39 _REG_(WATCHDOG_REASON_OFFSET) // WATCHDOG_REASON
40 // Logs the reason for the last reset
41 // 0x00000002 [1] : FORCE (0)
42 // 0x00000001 [0] : TIMER (0)
43 io_ro_32 reason;
44
45 _REG_(WATCHDOG_SCRATCH0_OFFSET) // WATCHDOG_SCRATCH0
46 // (Description copied from array index 0 register WATCHDOG_SCRATCH0 applies similarly to other array indexes)
47 //
48 // Scratch register
49 io_rw_32 scratch[8];
50
51 _REG_(WATCHDOG_TICK_OFFSET) // WATCHDOG_TICK
52 // Controls the tick generator
53 // 0x000ff800 [19:11] : COUNT (0): Count down timer: the remaining number clk_tick cycles before the next tick is generated
54 // 0x00000400 [10] : RUNNING (0): Is the tick generator running?
55 // 0x00000200 [9] : ENABLE (1): start / stop tick generation
56 // 0x000001ff [8:0] : CYCLES (0): Total number of clk_tick cycles before the next tick
57 io_rw_32 tick;
59
60#define watchdog_hw ((watchdog_hw_t *)WATCHDOG_BASE)
61
62#endif
Definition watchdog.h:23